SPARK:: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits

Also described are speculative code motion techniques and dynamic compiler transformations that optimize the circuit quality in terms of cycle time, circuit size and interconnect costs. We describe the SPARK parallelizing high-level synthesis framework in which we have implemented these techniques and demonstrate the utility of SPARK’s PHLS approach using designs derived from multimedia and image processing applications. We also present a case study of an instruction length decoder derived from the Intel Pentium-class of microprocessors. This case study serves as an example of a typical microprocessor functional block with complex control flow and demonstrates how our techniques are useful for such designs. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuitsis targeted mainly to embedded system designers and researchers. This includes people working on design and design automation. The book is useful for researchers and design automation engineers who wish to understand how the main problems hindering the adoption of high-level synthesis among designers.